How to Solve The Common Problems in PCB Circuit Design?

I. The pad overlap
1. The overlap of pads (in addition to surface paste pads) means that the overlap of holes, in the drilling process will lead to broken drill bit because of multiple drilling in one place, resulting in damage to the hole.
2. Multilayer board in two holes overlap, such as a hole for the isolation disk, another hole for the connection disk (flower pads), so that after drawing out the negative performance for the isolation disk, resulting in scrap.
 
II. The abuse of graphics layer
1. In some graphics layer to do some useless connection, originally four-layer board but designed more than five layers of the line, so that the cause of misunderstanding.
2. Design to save time, Protel software, for example, to all layers of the line with Board layer to draw, and Board layer to scratch the label line, so that when the light drawing data, because the Board layer was not selected, missed the connection and break, or will be short-circuited because of the choice of Board layer of the label line, so the design to keep the integrity of the graphics layer and clear.
3. Against the conventional design, such as component surface design in the Bottom layer, welding surface design in the Top, resulting in inconvenience.
 
III. The character of the chaotic placement
1. The character cover pads SMD solder lug, to the printed board through test and component welding inconvenience.
2. The character design is too small, causing difficulties in the screen printer machine printing, too large to make the characters overlap each other, difficult to distinguish.
 
IV. The single-sided pad aperture settings
1. Single-sided pads are generally not drilled, if the hole needs to be marked, its aperture should be designed to zero. If the value is designed so that when the drilling data is generated, this position appears in the hole coordinates, and the problem.
2. Single-sided pads such as drilling should be specially marked.
 
V. With the filling block to draw pads
With filler block drawing pad in the design of the line can pass the DRC check, but for processing is not possible, so the class pad can not directly generate solder resist data, when on the solder resist, the filler block area will be covered by the solder resist, resulting in device soldering difficulties.
 
VI. The electrical ground layer is also a flower pad and is connected to the line
Because the power supply designed as a flower pad way, the ground layer and the actual image on the printed board is the opposite, all the connecting lines are isolated lines, which the designer should be very clear. Here by the way, drawing several groups of power or several ground isolation line should be careful not to leave a gap, so that the two groups of power short-circuit, nor can cause the connection of the area blocked (so that a group of power is separated).
 
VII. Processing level is not clearly defined
1. A single panel design in the TOP layer, such as not adding a description of the positive and negative do, perhaps made out of the board mounted on the device and not good welding.
2. for example, a four-layer board design using TOP mid1, mid2 bottom four layers, but the processing is not placed in this order, which requires instructions.
 
VIII. The design of the filler block too much or filler block with a very thin line filling
1. There is a loss of light drawing data generated, light drawing data is not complete.
2. Because the filling block in the light drawing data processing is used line by line to draw, therefore the amount of light drawing data produced is quite large, increased the difficulty of data processing.
 
IX. Surface mount device pad is too short
This is for the through and through test, for too dense surface mount device, the spacing between its two feet is quite small, the pad is also quite thin, installation test needle, must be up and down (left and right) staggered position, such as the pad design is too short, although does not affect the device installation, but will make the test needle wrong not open position.

X. The spacing of large-area grid is too small
Composition of large area grid line with the line between the edge is too small (less than 0.3mm), in the manufacturing process of the printed circuit board, figure transfer process after the development of the shadow is easy to produce a lot of broken film attached to the board, resulting in broken lines.

XI. Large-area copper foil from the outer frame of the distance is too close
Large area copper foil from the outer frame should be at least 0.2mm spacing, because in the milling shape, such as milling to the copper foil is easy to cause copper foil warping and caused by the problem of solder resistance off.
 
XII. The shape of the border design is not clear
Some customers in Keep layer, Board layer, Top over layer, etc. are designed shape line and these shape lines do not overlap, resulting in pcb manufacturers difficult to determine which shape line shall prevail.

XIII. Uneven graphic design
Uneven plating layer when plating graphics affects the quality.
 
XIV. The copper laying area is too large when the application of grid lines, to avoid SMT blistering.

NeoDen SMT Production line


Post time: Jan-07-2022

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